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1. WO2020162417 - ELECTRONIC APPARATUS, SEMICONDUCTOR DEVICE, INSULATING SHEET, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Publication Number WO/2020/162417
Publication Date 13.08.2020
International Application No. PCT/JP2020/003993
International Filing Date 03.02.2020
IPC
H01L 23/36 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
34Arrangements for cooling, heating, ventilating or temperature compensation
36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H01L 23/40 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
34Arrangements for cooling, heating, ventilating or temperature compensation
40Mountings or securing means for detachable cooling or heating arrangements
H05K 7/20 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
7Constructional details common to different types of electric apparatus
20Modifications to facilitate cooling, ventilating, or heating
CPC
H01L 2224/131
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
12Structure, shape, material or disposition of the bump connectors prior to the connecting process
13of an individual bump connector
13001Core members of the bump connector
13099Material
131with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
H01L 2224/16227
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
16227the bump connector connecting to a bond pad of the item
H01L 2224/32225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/32245
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32245the item being metallic
H01L 2224/33181
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
33of a plurality of layer connectors
331Disposition
3318being disposed on at least two different sides of the body, e.g. dual array
33181On opposite sides of the body
H01L 2224/48227
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
48221the body and the item being stacked
48225the item being non-metallic, e.g. insulating substrate with or without metallisation
48227connecting the wire to a bond pad of the item
Applicants
  • 株式会社ソニー・インタラクティブエンタテインメント SONY INTERACTIVE ENTERTAINMENT INC. [JP]/[JP]
Inventors
  • 土田 真也 TSUCHIDA, Shinya
  • サベルストロム ニルス SABELSTROM, Nils
  • 森下 允晴 MORISHITA, Mitsuharu
  • 廣瀬 健治 HIROSE, Kenji
  • 林原 正憲 HAYASHIBARA, Masanori
  • 田村 哲司 TAMURA, Tetsuji
  • 大西 整 OONISHI, Sei
  • 菅原 信之 SUGAWARA, Nobuyuki
Agents
  • 特許業務法人はるか国際特許事務所 HARUKA PATENT & TRADEMARK ATTORNEYS
Priority Data
2019-01821704.02.2019JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) ELECTRONIC APPARATUS, SEMICONDUCTOR DEVICE, INSULATING SHEET, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
(FR) APPAREIL ÉLECTRONIQUE, DISPOSITIF À SEMI-CONDUCTEUR, FEUILLE D'ISOLATION ET PROCÉDÉ DE FABRICATION DE DISPOSITIF À SEMI-CONDUCTEUR
(JA) 電子機器、半導体装置、絶縁シート、及び半導体装置の製造方法
Abstract
(EN) The present invention provides a structure in which a metal having fluidity is utilized as a heat conductive material. In this structure, a heat conductive material is prevented from invading an unintended region even when a positional change of a semiconductor device occurs or a vibration occurs. This electronic apparatus has a heat conductive material (31) formed between a heat radiator (50) and a semiconductor chip (11). The heat conductive material (31) has fluidity at least when the semiconductor chip (11) is in operation. The heat conductive material (31) has electroconductivity. The heat conductive material (31) is surrounded by a seal member (33). A capacitor (16) is covered by an insulating section (15).
(FR) La présente invention concerne une structure dans laquelle un métal ayant une fluidité est utilisé comme matériau thermoconducteur. Dans cette structure, un matériau thermoconducteur est empêché de pénétrer dans une région non souhaitée même lorsqu'un changement de position d'un dispositif à semi-conducteur se produit ou une vibration se produit. Cet appareil électronique comprend un matériau thermoconducteur (31) formé entre un radiateur thermique (50) et une puce semi-conductrice (11). Le matériau thermoconducteur (31) présente une fluidité au moins lorsque la puce à semi-conducteur (11) est en fonctionnement. Le matériau thermoconducteur (31) a une électroconductivité. Le matériau thermoconducteur (31) est entouré par un élément d'étanchéité (33). Un condensateur (16) est recouvert par une section isolante (15).
(JA) 流動性を有する金属を熱伝導材料として利用する構造において、半導体装置の姿勢変化や振動が生じた場合でも、熱伝導材料が意図しない領域に浸入することを防ぐ。電子機器は、放熱器(50)と半導体チップ(11)との間に形成される熱伝導材料(31)を有している.熱伝導材料(31)は、少なくと半導体チップ(11)の動作時に流動性を有する。また、熱伝導材料(31)は導電性を有する。熱伝導材料(31)はシール部材(33)によって取り囲まれる。キャパシタ(16)は絶縁部(15)によって覆われる。
Related patent documents
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